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Memory Requirements Analysis for PRP and HSR Hardware Implementations on FPGAs

dc.contributor.authorAraujo Parra, José Ángel ORCID
dc.contributor.authorLázaro Arrotegui, Jesús
dc.contributor.authorAstarloa Cuéllar, Armando Fermín
dc.contributor.authorMoreira Ciruelos, Naiara
dc.contributor.authorGarcía, Alain
dc.date.accessioned2024-02-08T10:31:04Z
dc.date.available2024-02-08T10:31:04Z
dc.date.issued2014-01-02
dc.identifier.citationIECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society : 2297-2302 (2014)es_ES
dc.identifier.isbn978-1-4799-0224-8
dc.identifier.issn1553-572X
dc.identifier.urihttp://hdl.handle.net/10810/65336
dc.description.abstractThe IEC62439-3 defines two ways to obtain a high availability automation network: Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR). In order to do that, those methods include different paths to send information frames from source to destination and add a redundancy field to the frames. Nodes in the network must remember arrived frames so as to manage the duplicated information. In this paper the requirements of memory needed for a hardware implementation are analyzed.es_ES
dc.description.sponsorshipResearch and Education Unit UFI11/16 of the UPV/EHU and supported by the Department of Education, Universities and Research of the Basque Government within the fund for research groups of the Basque university system IT394-10 and the research program SAIOTEK (project S-PEI2UN008).es_ES
dc.language.isoenges_ES
dc.publisherIEEEes_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.subjectEthernetes_ES
dc.subjectavailability
dc.subjectredundancy
dc.subjectHSR
dc.subjectPRP
dc.subjectIEC62439-3
dc.titleMemory Requirements Analysis for PRP and HSR Hardware Implementations on FPGAses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.rights.holder(c) 2013 IEEEes_ES
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/6699489
dc.identifier.doi/10.1109/IECON.2013.6699489
dc.departamentoesTecnología electrónicaes_ES
dc.departamentoeuTeknologia elektronikoaes_ES


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