Browsing by Author "Bidarte, Unai"
Now showing items 1-13 of 13
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A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems
Rodríguez, Mikel; Lázaro Arrotegui, Jesús; Bidarte Peraita, Unai ; Jiménez Verde, Jaime; Astarloa Cuéllar, Armando Fermín (IEEE, 2021-03-26)International Electrotechnical Commission (IEC) 62351-6 standard specifies the security mechanisms to protect real-time communications based on IEC 61850. Generic Object Oriented Substation Events (GOOSE) and Sampled Value ... -
Caracterización de la tolerancia a fallos de circuitos implementados en FPGAs
Villalta Bustillo, Igor (2019-05-17)Las FPGAs (Field-Programmable Gate Array) y los SoC (System-on-chip) basados en FPGA son dispositivos electrónicos configurables en campo (in field), que ofrecen la posibilidad de desarrollar un circuito a medida con un ... -
Diseño e implementación de nuevas funcionalidades en emulador de canal RF sobre dispositivo con multiprocesamiento asimétrico y lógica programable
Ros Marauri, Gorka (2023-05-02)En la industria 4.0, se quiere fomentar el uso de tecnologías inalámbricas. Sin embargo, debido a la naturaleza de la propagación inalámbrica, aún es difícil cumplir con los requisitos de fiabilidad, latencia y determinismo ... -
Embedded firewall for on-chip bus transactions
Lázaro Arrotegui, Jesús; Bidarte Peraita, Unai ; Muguira Urtubi, Leire ; Astarloa Cuéllar, Armando Fermín; Jiménez Verde, Jaime (Elsevier, 2022-03)This article presents a novel approach towards System-on-Chip (SoC) security. Although communications security and operating system hardening have been studied, new application opportunities and menaces have appeared with ... -
Encryption AXI Transaction Core for Enhanced FPGA Security
Lázaro Arrotegui, Jesús; Astarloa Cuéllar, Armando Fermín; Muguira Urtubi, Leire ; Bidarte Peraita, Unai ; Jiménez Verde, Jaime (MDPI, 2022-10-18)The current hot topic in cyber-security is not constrained to software layers. As attacks on electronic circuits have become more usual and dangerous, hardening digital System-on-Chips has become crucial. This article ... -
Evaluating Latency in Multiprocessing Embedded Systems for the Smart Grid
Alonso Salazar, Sara ; Lázaro Arrotegui, Jesús; Jiménez Verde, Jaime; Bidarte Peraita, Unai ; Muguira Urtubi, Leire (MDPI, 2021-06-05)Smart grid endpoints need to use two environments within a processing system (PS), one with a Linux-type operating system (OS) using the Arm Cortex-A53 cores for management tasks, and the other with a standalone execution ... -
Fast and efficient address search in System-on-a-Programmable-Chip using binary trees
Lázaro Arrotegui, Jesús; Bidarte Peraita, Unai ; Muguira Urtubi, Leire ; Cuadrado, Carlos; Jiménez Verde, Jaime (Elsevier, 2021-12)One processing task in Ethernet nodes is to manage Media Access Control (MAC) addresses: search, insert new, and delete old ones. For this purpose, Content-Addressable Memorys (CAMs) offer low latency and no collisions; ... -
Functional Verification for SEU Emulation in FPGA Designs
Villalta Bustillo, Igor; Bidarte Peraita, Unai ; Kretzchmar, Uli; Santos, Gorka; Matallana Fernandez, Asier (2014-09-17)In this paper techniques to detect failures in a FPGA are presented and their application to SEU (Single Event Upset) emulation applications is discussed. SEU emulation in FPGAs consists on programming the device with a ... -
Interrupt Latency Accurate Measurement in Multiprocessing Embedded Systems by Means of a Dedicated Circuit
Alonso Salazar, Sara ; Muguira Urtubi, Leire ; Gárate Añibarro, José Ignacio; Cuadrado Viana, Carlos; Bidarte Peraita, Unai (MDPI, 2024-04-24)Modern multiprocessing embedded applications require, in many cases, two different environments on the same platform: one that meets real-time requirements and another one with a general purpose operating system. Although ... -
MACsec Layer 2 Security in HSR Rings in Substation Automation Systems
Lázaro Arrotegui, Jesús; Astarloa Cuéllar, Armando Fermín; Araujo Parra, José Ángel ; Moreira Ciruelos, Naiara; Bidarte Peraita, Unai (MDPI, 2017-01-31)The smart-grid concept takes the communications from the enclosed and protected environment of a substation to the wider city or nationwide area. In this environment, cyber security takes a key role in order to secure the ... -
Procesado de comunicaciones Time-Sensitive Networking (TSN) en FPGA y análisis de las mismas en PC
Rodríguez Elorriaga, Igor (2020-10-15)Hoy en día, la industria 4.0 es una realidad y junto con ella la tendencia de introducir el internet de las cosas (IoT, Internet of Things) y los CPS (Cyber-Physical-Systems) al mundo de las Tecnologías de la Operación ... -
Reconfigurable Multiprocessor Systems: A Review
Dorta Pérez, Silvestre Taho; Jiménez Verde, Jaime; Martín González, José Luis ; Bidarte Peraita, Unai ; Astarloa Cuéllar, Armando Fermín (Hindawi Publishing Corporation, 2010)Modern digital systems demand increasing electronic resources, so the multiprocessor platforms are a suitable solution for them. This approach provides better results in terms of area, speed, and power consumption ... -
Specific Electronic Platform to Test the Influence of Hypervisors on the Performance of Embedded Systems
Jiménez Verde, Jaime ; Muguira Urtubi, Leire ; Bidarte Peraita, Unai ; Largacha, Alejandro ; Lázaro Arrotegui, Jesús (MDPI, 2022)[EN] Some complex digital circuits must host various operating systems in a single electronic platform to make real-time and not-real-time tasks compatible or assign different priorities to current applications. For this ...