dc.contributor.author | Matallana Fernandez, Asier ![ORCID](/themes/Mirage2//images/orcid_16x16.png) | |
dc.contributor.author | Andreu Larrañaga, Jon ![ORCID](/themes/Mirage2//images/orcid_16x16.png) | |
dc.contributor.author | Gárate Añibarro, José Ignacio | |
dc.contributor.author | Aretxabaleta Astoreka, Iker | |
dc.contributor.author | Kortabarria Iparragirre, Iñigo ![ORCID](/themes/Mirage2//images/orcid_16x16.png) | |
dc.date.accessioned | 2024-06-18T14:06:53Z | |
dc.date.available | 2024-06-18T14:06:53Z | |
dc.date.issued | 2018-06-05 | |
dc.identifier.citation | PCIM Europe 2018; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, Nuremberg, Germany : 1-8 (2018) | es_ES |
dc.identifier.isbn | 978-3-8007-4646-0 | |
dc.identifier.uri | http://hdl.handle.net/10810/68496 | |
dc.description | Articulo Congreso PCIM 2018 - VDE | es_ES |
dc.description.abstract | The aim of this work is to design a DC bus for a silicon carbide power converter whose application is the automotive sector. This power converter works at high voltage and current levels with high frequencies signals, so a DC bus design with low impedance is necessary. Moreover, current has to flow homogeneously to avoid imbalances between bus capacitors. In order to get this goal, different
design criteria are explained. These criteria are based on the theory of semiconductor parallelization, where the control and equal distribution of parasitic impedances is fundamental to get a modular bus structure, where the symmetrical design and mutual coupling effect of different layers produce a
current balance over the wide and long copper areas of this DC bus. | es_ES |
dc.description.sponsorship | This work has been supported by the Department of Education, Linguistic Policy and Culture of the Basque Government within the fund for research groups of the Basque university system IT978-16 and the research program ELKARTEK as the project KT4TRANS (KK-2015/00047 and KK-2016/00061). The support of the Ministerio de Economía y Competitividad of Spain within
the project DPI2014-53685-C2-2-R and FEDER funds. As well as, the program to support the education of researches of the Basque Country PRE_2017_2_0008 and technical and human support provided by IZO-SGI SGIker of UPV/EHU and European funding (ERDF and ESF). | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | VDE | es_ES |
dc.relation | info:eu-repo/grantAgreement/MINECO/DPI2014-53685-C2-2-R | es_ES |
dc.rights | info:eu-repo/semantics/openAccess | es_ES |
dc.title | Analysis and Design of a Multilayer DC Bus With Low Stray Impedance and Homogenous Current Distribution | es_ES |
dc.type | info:eu-repo/semantics/article | es_ES |
dc.rights.holder | © 2018 VDE VERLAG | es_ES |
dc.relation.publisherversion | https://ieeexplore-ieee-org.ehu.idm.oclc.org/document/8403058 | es_ES |
dc.departamentoes | Tecnología electrónica | es_ES |
dc.departamentoeu | Teknologia elektronikoa | es_ES |