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dc.contributor.authorAlonso Salazar, Sara ORCID
dc.contributor.authorLázaro Arrotegui, Jesús
dc.contributor.authorJiménez Verde, Jaime
dc.contributor.authorBidarte Peraita, Unai ORCID
dc.contributor.authorMuguira Urtubi, Leire ORCID
dc.date.accessioned2021-06-21T10:23:04Z
dc.date.available2021-06-21T10:23:04Z
dc.date.issued2021-06-05
dc.identifier.citationEnergies 14(11) : (2021) // Article ID 3322es_ES
dc.identifier.issn1996-1073
dc.identifier.urihttp://hdl.handle.net/10810/51960
dc.description.abstractSmart grid endpoints need to use two environments within a processing system (PS), one with a Linux-type operating system (OS) using the Arm Cortex-A53 cores for management tasks, and the other with a standalone execution or a real-time OS using the Arm Cortex-R5 cores. The Xen hypervisor and the OpenAMP framework allow this, but they may introduce a delay in the system, and some messages in the smart grid need a latency lower than 3 ms. In this paper, the Linux thread latencies are characterized by the Cyclictest tool. It is shown that when Xen hypervisor is used, this scenario is not suitable for the smart grid as it does not meet the 3 ms timing constraint. Then, standalone execution as the real-time part is evaluated, measuring the delay to handle an interrupt created in programmable logic (PL). The standalone application was run in A53 and R5 cores, with Xen hypervisor and OpenAMP framework. These scenarios all met the 3 ms constraint. The main contribution of the present work is the detailed characterization of each real-time execution, in order to facilitate selecting the most suitable one for each application.es_ES
dc.description.sponsorshipThis work has been supported by the Ministerio de Economía y Competitividad of Spain within the project TEC2017-84011-R and FEDER funds as well as by the Department of Education of the Basque Government within the fund for research groups of the Basque university system IT978-16. It has also been supported by the Basque Government within the project HAZITEK ZE-2020/00022 as well as the Ministerio de Ciencia e Innovación of Spain through the Centro para el Desarrollo Tecnológico Industrial (CDTI) within the project IDI-20201264; in both cases, they have been financed through the Fondo Europeo de Desarrollo Regional 2014-2020 (FEDER funds). It has also been supported by the University of the Basque Country within the scholarship for training of research staff with code PIF20/135.es_ES
dc.language.isoenges_ES
dc.publisherMDPIes_ES
dc.relationinfo:eu-repo/grantAgreement/MINECO/TEC2017-84011-Res_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/es/
dc.subjectvirtualizationes_ES
dc.subjectXen hypervisores_ES
dc.subjectsystem-on-chipes_ES
dc.subjectlatencyes_ES
dc.subjectCyclictestes_ES
dc.subjectinterruptes_ES
dc.subjectOpenAMPes_ES
dc.subjectmultiprocessinges_ES
dc.titleEvaluating Latency in Multiprocessing Embedded Systems for the Smart Grides_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.date.updated2021-06-10T13:46:48Z
dc.rights.holder2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).es_ES
dc.relation.publisherversionhttps://www.mdpi.com/1996-1073/14/11/3322/htmes_ES
dc.identifier.doi10.3390/en14113322
dc.departamentoesTecnología electrónica
dc.departamentoeuTeknologia elektronikoa


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2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
Except where otherwise noted, this item's license is described as 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).