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dc.contributor.authorLázaro Arrotegui, Jesús
dc.contributor.authorBidarte Peraita, Unai ORCID
dc.contributor.authorMuguira Urtubi, Leire ORCID
dc.contributor.authorAstarloa Cuéllar, Armando Fermín
dc.contributor.authorJiménez Verde, Jaime
dc.date.accessioned2024-05-21T17:27:39Z
dc.date.available2024-05-21T17:27:39Z
dc.date.issued2022-03
dc.identifier.citationComputers & Electrical Engineering 98 : (2022) // Article ID 107707es_ES
dc.identifier.issn1879-0755
dc.identifier.issn0045-7906
dc.identifier.urihttp://hdl.handle.net/10810/68085
dc.description.abstractThis article presents a novel approach towards System-on-Chip (SoC) security. Although communications security and operating system hardening have been studied, new application opportunities and menaces have appeared with the incorporation of Multiprocessor-System-on-Chip (MPSoC) into the Internet of Things (IoT). Reliable implementation environments have become necessary, so novel security architectures and solutions have been introduced to protect the vulnerable data, which could be used by plenty of these applications. We propose an Advanced eXtensible Interface (AXI) transaction firewall, which, by checking the type of operation, the physical address, and the bandwidth according to a set of rules, rejects untrusted requests between cores. Results have been performed on a Zynq platform, and obtained results show that the proposed AXI-firewall can prevent unauthorized transactions consuming few hardware resources. Besides, the fully combinational nature of the firewall’s AXI to AXI path entails that the firewall does not affect the overall performance of the system.es_ES
dc.language.isoenges_ES
dc.publisherElsevieres_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/es/*
dc.subjectcommunication system securityes_ES
dc.subjectdata buseses_ES
dc.subjectdata securityes_ES
dc.subjectfield programmable gate arrayses_ES
dc.titleEmbedded firewall for on-chip bus transactionses_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.rights.holder© 2022 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY license.es_ES
dc.rights.holderAtribución 3.0 España*
dc.relation.publisherversionhttps://www.sciencedirect.com/science/article/pii/S0045790622000246es_ES
dc.identifier.doi10.1016/j.compeleceng.2022.107707
dc.departamentoesTecnología electrónicaes_ES
dc.departamentoeuTeknologia elektronikoaes_ES


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© 2022 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY license.
Except where otherwise noted, this item's license is described as © 2022 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY license.