dc.contributor.author | Lázaro Arrotegui, Jesús | |
dc.contributor.author | Bidarte Peraita, Unai ![ORCID](/themes/Mirage2//images/orcid_16x16.png) | |
dc.contributor.author | Muguira Urtubi, Leire ![ORCID](/themes/Mirage2//images/orcid_16x16.png) | |
dc.contributor.author | Astarloa Cuéllar, Armando Fermín | |
dc.contributor.author | Jiménez Verde, Jaime | |
dc.date.accessioned | 2024-05-21T17:27:39Z | |
dc.date.available | 2024-05-21T17:27:39Z | |
dc.date.issued | 2022-03 | |
dc.identifier.citation | Computers & Electrical Engineering 98 : (2022) // Article ID 107707 | es_ES |
dc.identifier.issn | 1879-0755 | |
dc.identifier.issn | 0045-7906 | |
dc.identifier.uri | http://hdl.handle.net/10810/68085 | |
dc.description.abstract | This article presents a novel approach towards System-on-Chip (SoC) security. Although communications security and operating system hardening have been studied, new application opportunities and menaces have appeared with the incorporation of Multiprocessor-System-on-Chip (MPSoC) into the Internet of Things (IoT). Reliable implementation environments have become necessary, so novel security architectures and solutions have been introduced to protect the vulnerable data, which could be used by plenty of these applications.
We propose an Advanced eXtensible Interface (AXI) transaction firewall, which, by checking the type of operation, the physical address, and the bandwidth according to a set of rules, rejects untrusted requests between cores. Results have been performed on a Zynq platform, and obtained results show that the proposed AXI-firewall can prevent unauthorized transactions consuming few hardware resources. Besides, the fully combinational nature of the firewall’s AXI to AXI path entails that the firewall does not affect the overall performance of the system. | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | Elsevier | es_ES |
dc.rights | info:eu-repo/semantics/openAccess | es_ES |
dc.rights.uri | http://creativecommons.org/licenses/by/3.0/es/ | * |
dc.subject | communication system security | es_ES |
dc.subject | data buses | es_ES |
dc.subject | data security | es_ES |
dc.subject | field programmable gate arrays | es_ES |
dc.title | Embedded firewall for on-chip bus transactions | es_ES |
dc.type | info:eu-repo/semantics/article | es_ES |
dc.rights.holder | © 2022 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY license. | es_ES |
dc.rights.holder | Atribución 3.0 España | * |
dc.relation.publisherversion | https://www.sciencedirect.com/science/article/pii/S0045790622000246 | es_ES |
dc.identifier.doi | 10.1016/j.compeleceng.2022.107707 | |
dc.departamentoes | Tecnología electrónica | es_ES |
dc.departamentoeu | Teknologia elektronikoa | es_ES |